Technical Description

Introduction

It is important to test the characteristics of a transistor before they go into production. Silvaco TCAD is a tool which allows for simulation of semiconductor devices. Technology Computer-Aided Design (TCAD) software provides an effective solution for simulating semiconductor device structure under steady-state and transient condition. Analysis of electro-thermal parameters like electric field, leakage current, localized heating, and lattice temperature can aid in isolating structural vulnerability and understanding possible causes of device failure. The Silvaco TCAD primarily consists of ATLAS, ATHENA, DECKBUILD and TONYPLOT.

ATHENA is a general purpose process simulator (1D or 2D) for applications across the fabrication process like etching, deposition, implant, annealing etc. ATHENA is a more cost-effective time effective simulator for real-world experiments. ATHENA incorporates a very fast and accurate analytical and Monte-Carlo models. It builds on the performance of the Stanford legacy tools, thus allowing it to achieve several runs and process design optimization efficiently.

ATLAS is a physically-based two and three dimensional (3D) device simulation tool which enables the simulation of semiconductor technologies. It is used to predict the electrical behaviour (such as DC, AC, transient) of different semiconductor devices, and gives understanding of the internal physical mechanisms associated with the device operation. ATLAS often uses the physical structures and doping profiles generated by ATHENA. When scaling to smaller and smaller dimensions continues, 3D simulation becomes imperative. A narrow but long transistor can be simulated by a 2D simulator, but a narrow and short transistor with similar dimensions in both x and y directions really needs 3D view to analyse comprehensively. Complexity and time of simulation increase drastically over the 2D view.

DECKBUILD is the graphical user interface (GUI) for Silvaco TCAD programs that allows a user to go transparently from ATHENA process simulation to ATLAS device simulation. DECKBUILD has numerous simulator specific and general debugger style tools, convenient extract statements, GUI based process file input, sequential run-time execution and input file syntactical error messages. DECKBUILD supports arbitrary number of stop points during execution.

TONYPLOT is the visualization tool. It provides comprehensive capabilities for viewing and analysing simulator output. The data can be plotted as desired by the user either in one or two-dimensional graphs i.e. 1D x-y data, 2D contour data, 2D meshed data, smith charts and polar charts. The overlays feature helps in comparing the multiple simulation runs. It also supports overlay feature to compare multiple plots.

MATLAB (matrix laboratory) is a multi-paradigm numerical computing environment and proprietary programming language developed by MathWorks. MATLAB allows implementation of algorithms, plotting of functions and data and matrix manipulations. In use of Artificial Intelligence, the integrated apps in the MATLAB software allow to pre-process data efficiently. The Statistics and Machine Learning Toolbox in MATLAB provides applications for advanced signal processing and feature extraction, training and comparing models, regression, classification, and clustering algorithms for supervised and unsupervised learning. The Deep Learning Toolbox allows to create, interconnect, train, and evaluate the layers of a deep neural network.

MOS Reference Device

The TCAD tool has an in-built examples of a MOS reference device. The code is as follows - 

1. # (c) Silvaco Inc., 2018
2. go athena
3. 
   
4. #
5. line x loc=0.0 spac=0.1 
6. line x loc=0.2 spac=0.006
7. line x loc=0.4 spac=0.006
8. line x loc=0.6 spac=0.01 
9. #
10. line y loc=0.0 spac=0.002 
11. line y loc=0.2 spac=0.005
12. line y loc=0.5 spac=0.05
13. line y loc=0.8 spac=0.15 
14. #
15. init orientation=100 c.phos=1e14 space.mul=2
16. 
    
17. #pwell formation including masking off of the nwell
18. #
19. diffus time=30 temp=1000 dryo2 press=1.00 hcl=3
20. #
21. etch oxide thick=0.02
22. #
23. #P-well Implant
24. # 
25. implant boron dose=8e12 energy=100 pears 
26. 
    
27. #
28. diffus temp=950 time=100 weto2 hcl=3
29. #
30. #N-well implant not shown -
31. #
32. # welldrive starts here
33. diffus time=50 temp=1000 t.rate=4.000 dryo2 press=0.10 hcl=3
34. #
35. diffus time=220 temp=1200 nitro press=1
36. #
37. diffus time=90 temp=1200 t.rate=-4.444 nitro press=1
38. #
39. etch oxide all
40. #
41. #sacrificial "cleaning" oxide
42. diffus time=20 temp=1000 dryo2 press=1 hcl=3
43. #
44. etch oxide all
45. #
46. #gate oxide grown here:-
47. diffus time=11 temp=925 dryo2 press=1.00 hcl=3
48. #
49. # Extract a design parameter 
50. extract name="gateox" thickness oxide mat.occno=1 x.val=0.05
51. 
    
52. #
53. #vt adjust implant 
54. implant boron dose=9.5e11 energy=10 pearson 
55. 
    
56. #
57. depo poly thick=0.2 divi=10 
58. #
59. #from now on the situation is 2-D
60. #
61. etch poly left p1.x=0.35
62. #
63. method fermi compress
64. diffuse time=3 temp=900 weto2 press=1.0
65. #
66. implant phosphor dose=3.0e13 energy=20 pearson 
67. #
68. depo oxide thick=0.120 divisions=8
69. #
70. etch oxide dry thick=0.120
71. #
72. implant arsenic dose=5.0e15 energy=50 pearson 
73. #
74. method fermi compress
75. diffuse time=1 temp=900 nitro press=1.0
76. #
77. 
    
78. # pattern s/d contact metal
79. etch oxide left p1.x=0.2
80. deposit alumin thick=0.03 divi=2
81. etch alumin right p1.x=0.18
82. 
    
83. # Extract design parameters
84. 
    
85. # extract final S/D Xj
86. extract name="nxj" xj silicon mat.occno=1 x.val=0.1 junc.occno=1
87. 
    
88. # extract the N++ regions sheet resistance
89. extract name="n++ sheet rho" sheet.res material="Silicon" mat.occno=1 x.val=0.05 region.occno=1
90. 
    
91. # extract the sheet rho under the spacer, of the LDD region
92. extract name="ldd sheet rho" sheet.res material="Silicon" \
93. mat.occno=1 x.val=0.3 region.occno=1
94. 
    
95. # extract the surface conc under the channel.
96. extract name="chan surf conc" surf.conc impurity="Net Doping" \
97. material="Silicon" mat.occno=1 x.val=0.45
98. 
    
99. # extract a curve of conductance versus bias.
100. extract start material="Polysilicon" mat.occno=1 \
101. bias=0.0 bias.step=0.2 bias.stop=2 x.val=0.45
102. extract done name="sheet cond v bias" \
103. curve(bias,1dn.conduct material="Silicon" mat.occno=1  region.occno=1)\
104. outfile="extract.dat"
105. 
     
106. # extract the long chan Vt
107. extract name="n1dvt" 1dvt ntype vb=0.0 qss=1e10 x.val=0.49
108. 
     
109. 
     
110. structure mirror right
111. 
     
112. electrode name=gate x=0.5 y=0.1
113. electrode name=source x=0.1
114. electrode name=drain x=1.1
115. electrode name=substrate backside
116. 
     
117. structure outfile=mos1ex01_0.str
118. 
     
119. # plot the structure
120. tonyplot  mos1ex01_0.str -set mos1ex01_0.set
121. 
     
122. ############# Vt Test : Returns Vt, Beta and Theta ################
123. go atlas
124. 
     
125. # set material models
126. models cvt srh print 
127. 
     
128. contact name=gate n.poly
129. interface qf=3e10
130. 
     
131. method newton
132. solve init
133. 
     
134. # Bias the drain 
135. solve vdrain=0.1 
136. 
     
137. # Ramp the gate
138. log outf=mos1ex01_1.log master
139. solve vgate=0 vstep=0.25 vfinal=3.0 name=gate
140. save outf=mos1ex01_1.str
141. 
     
142. # plot results
143. tonyplot  mos1ex01_1.log -set mos1ex01_1_log.set
144. 
     
145. # extract device parameters
146. extract name="nvt" (xintercept(maxslope(curve(abs(v."gate"),abs(i."drain")))) \
147. - abs(ave(v."drain"))/2.0)
148. extract name="nbeta" slope(maxslope(curve(abs(v."gate"),abs(i."drain")))) \
149. * (1.0/abs(ave(v."drain")))
150. extract name="ntheta" ((max(abs(v."drain")) * $"nbeta")/max(abs(i."drain"))) \
151. - (1.0 / (max(abs(v."gate")) - ($"nvt")))
152. 
     
153. quit

Line 2 is used to indicate the start of Athena code. Line 5 to 13 is used to define the mesh (grid) size and spacing. A grid is used to improve the accuracy and timing of the device. The grid is defined using the Mesh Define window under the Write options.

The next step is to initialize the mesh. Defining the mesh also sets the substrate region by specifying the material, the background doping, the orientation and some other additional parameters. In the GUI in figure A-7, <100> silicon is doped with Boron at a concentration of 2.9×1014 atom/cm3. The slider bar was used to specify the multiplication factor and the drop menu was used to select the exponent for the doping concentration.

The mesh is initialized. Defining the mesh also sets the substrate region by specifying the material, the background doping, the orientation. In the GUI in below figure, <100> silicon is doped with Boron at a concentration of 2.9×1014 atom/cm3. The slider bar was used to specify the multiplication factor and the drop menu was used to select the exponent for the doping concentration. This is generated as a code as shown in Line 15.

A PlotStructure is chosen under the Tools menu. This will invoke the tonyplot feature and will generate a plot of the current structure (.str) file.

The substrate is oxidized to form a thin layer of silicon dioxide. A smooth layer of SiO2 is then deposited on the substrate. The simplest deposit method in ATHENA is conformal deposition. It is used when the exact shape of the deposited layer is not critical. To simulate conformal deposition, the Deposit command from the  Process > Deposit > Deposit from the menu of deckbuild. The oxide was selected and the slider was used to define a thickness of 0.02m. The code is generated as shown in Line 19 and 21.

Because of the existence of oxide layer, implantation is easier. Implantation can be done by selecting Implant under Process in the Commands menu.

The code for implant will be generated as in Line 25. It is seen that the implant will be performed with an energy of 100keV. The default implant model used will be the Dual Pearson model.

Deposit command used to deposit oxide on the substrate and diffuse the implanted Boron atoms. The code generated for this is shown in Line 28. Running the simulation results in the profile as shown.

The next process to be performed is well drive. Well drive is performed to obtain the uniformity of the well. Further diffusion steps are performed using nitrogen to provide an inert environment for diffusion as an oxide is not required to form on the substrate. This process is called an annealing. The code for this step in shown in Line 32 to 37.

It is now required to etch the oxide present on the substrate to define the MOSFET physical features. The etch process can be simulated using the commands in Commands > Process > Etch. The command is given to etch all the present oxide. The code generated is in Line 39. The figure below shows the profile after etching.

Sacrificial cleaning is required. This is done by oxidation and completely etching the formed oxide.
The code is generated in Line 42 to 44.

The next step is to grow the gate oxide using the deposition commands. The figure below shows the gate oxide grown. The oxide thickness can be varied by varying the oxidation time and thickness.  The thickness also varies the threshold voltage. The line of code is Line 47.

Boron is implanted via the gate oxide grown. The code is in Line 54. The next step in device fabrication is the deposition of polysilicon to create the gate of the MOSFET. The deposition is similar to previous oxide depositions. The code for this step is in Line 57.

A plot of the current profile can be viewed by selecting Plot Structure from Plot under Tools in the deck-build window. The profile is obtained as below.

The gate is defined by defining points in the Etch menu and choosing the Geometric method. The shape is chosen as Any Shape. The points are to be defined manually using the mesh reference as shown in the figure below. The code is in Line 61.

The profile obtained is obtained as shown in figure below.

The source/drain is formed through deposition followed by an implantation. The code is from Line 63 to 66. The light drain/source can be seen in the substrate in the figure below.

A layer of oxide is grown again to provide isolation which helps in patterning further. The heavy source/drain is implanted in the same way as the light source/drain. The heavy source/drain is implanted with arsenic instead of phosphorous. The line of code is in Line 68 to 72, and the profile is shown below.

The heavy source/drain regions are diffused using annealing process to prevent unnecessary chemical reactions. The code is in Line 74 to 75. The oxide is etched above the source/drain region as in Line 79. The profile now looks as in figure below.

Aluminium is used as a contact metal for the source/drain regions and deposited over the entire device.  The unwanted metal regions are etched. The code is as in Line 80 to 81. The resultant profile is as follows.

Up to this point, only half the device is fabricated along the vertical axis. The other can be mirrored easily using the mirror option. To do this, Mirror is selected from the Structure menu in deck-build. The line of code is as shown in Line 110. The complete device is as seen below.

The electrodes for circuit connections are defined as in Line 112 to 115, and the final MOSFET is obtained as below.